2023

• [Sun-ICCV2023] Zihao Sun^#, Yu Sun^#, Longxing Yang, Shun Lu, Jilin Mei, Wenxiao Zhao*, Yu Hu*, Unleashing the Power of Gradient Signal-to-Noise Ratio for Zero-Shot NAS, accepted by IEEE International Conference on Computer Vision (ICCV), the Paris Convention Center, Paris, France, October 4-6, 2023. (Note: ^#these authors contributed equally to this work)

• [Lu-CVPR2023] Shun Lu, Yu Hu*, Longxing Yang, Zihao Sun, Jilin Mei, Jianchao Tan, Chengru Song, PA&DA: Jointly Sampling PAth and DAta for Consistent NAS, in IEEE Conference on Computer Vision and Pattern Recognition (CVPR), the Vancouver Convention Center, Vancouver, Canada, June 18-22, 2023.(Source Code) (Poster)

• [Lu-AAAI2023] Shun Lu, Yu Hu*, Peihao Wang, Yan Han, Jianchao Tan, Jixiang Li, Sen Yang, Ji Liu, PINAT: A Permutation INvariance Augmented Transformer for NAS Predictor, in AAAI Conference on Artificial Intelligence (AAAI), Oral, Washington, DC, USA, February 7-14, 2023. (Source Code) (Poster)

• [Mei-ICRA2023] Jilin Mei, Junbao Zhou, Yu Hu*, Few-shot 3D LiDAR Semantic Segmentation for Autonomous Driving, in IEEE International Conference on Robotics and Automation (ICRA), ExCeL London, UK, May 29 - June 2, 2023. (Poster)

• [Li-ICRA2023] Haoyu Li, Jilin Mei, Jiancong Zhou, Yu Hu*, Zero-shot Object Detection Based on Dynamic Semantic Vectors, in IEEE International Conference on Robotics and Automation (ICRA), ExCeL London, UK, May 29 - June 2, 2023. (Poster)

• [Chen-IROS2023] Wensong Chen, Wei Li*, Andong Yang, Yu Hu*, Active Visual SLAM Based on Hierarchical Reinforcement Learning, accepted by IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), Detroit, Michigan, USA, October 1- October 5, 2023.

• [Wu-IROS2023] Pengze Wu, Jilin Mei, Xijun Zhao, Yu Hu*, Generalized Few-shot Semantic Segmentation for LiDAR Point Clouds, accepted by IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), Detroit, Michigan, USA, October 1- October 5, 2023.

• [Zhou-IV2023] Jiancong Zhou, Jilin Mei*, Haoyu Li, Yu Hu*, PMR-CNN: Prototype Mixture R-CNN for Few-Shot Object Detection, in IEEE Intelligent Vehicles Symposium (IV), Anchorage, Alaska, USA, June 4 - June 7, 2023. (Poster)

• [YeLongLiang-IV2023] Hongliang Ye, Jilin Mei*, Yu Hu*, M2F2-Net: Multi-Modal Feature Fusion for Unstructured Off-Road Freespace Detection, in IEEE Intelligent Vehicles Symposium (IV), Anchorage, Alaska, USA, June 4 - June 7, 2023. (Poster)

• [YeCheng-IV2023] Cheng Ye, Wei Li*, Yu Hu*, A Tightly-Coupled GNSS RTK/INS Positioning Algorithm Based on Adaptive Lag Smoother, in IEEE Intelligent Vehicles Symposium (IV), Anchorage, Alaska, USA, June 4 - June 7, 2023. (Poster)

2022

• [Sun-ICML2022] Zihao Sun, Yu Hu*, Shun Lu, Longxing Yang, Jilin Mei, Yinhe Han, Xiaowei Li, AGNAS: Attention-Guided Micro- and Macro-Architecture Search, in IEEE International Conference on Machine Learning (ICML), Baltimore, Maryland, USA, July 17-23, 2022. (Source Code)

• [Yang-ICML2022] Longxing Yang, Yu Hu*, Shun Lu, Zihao Sun, Jilin Mei, Yinhe Han, Xiaowei Li, Searching for BurgerFormer with Micro-Meso-Macro Space Design, in IEEE International Conference on Machine Learning (ICML), Baltimore, Maryland, USA, July 17-23, 2022. (Source Code)

• [Yang-IROS2022] Andong Yang, Wei Li*, Yu Hu*, SMS-MPC: Adversarial Learning-based Simultaneous Prediction Control with Single Model for Mobile Robots, in IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), the Kyoto International Conference Center, Kyoto, Japan, October 23–27, 2022.

• [Niu-IJCNN2022] Jingyu Niu, Yu Hu*, Wei Li, Guangyan Huang, Yinhe Han, Xiaowei Li, Closing the Dynamics Gap via Adversarial and Reinforcement Learning for High-Speed Racing, in IEEE WCCI International Joint Conference on Neural Networks (IJCNN), oral (Candidate of Best Paper Award), Padua, Italy, July 18-23, 2022.

• [Sun-NeuroComputing2022] Zihao Sun, Yu Hu*, Longxing Yang, Shun Lu, Jilin Mei, Yinhe Han, Xiaowei Li, STC-NAS: Fast neural architecture search with source-target consistency, Neurocomputing, Volume 497: 227-238 (2022).

• [Jin-JCAD2022] Beibei Jin and Yu Hu*, Spatial-Temporal Wavelet Analysis Video Prediction Based on Differential Attention Mechanism (in Chinese), Journal of Computer-Aided Design & Computer Graphics (JCAD), 34(2): 180-188 (2022).

2021

• [Li-ICRA2021] Wei Li*, Yu Hu, Yinhe Han, and Xiaowei Li, KFS-LIO: Key-Feature Selection for Lightweight Lidar Inertial Odometry, in IEEE International Conference on Robotics and Automation (ICRA), Xi’an, China, May 30 - June 4, 2021.

• [Yang-ACML2021] Longxing Yang, Yu Hu*, Shun Lu, Zihao Sun, Jilin Mei, Yiming Zeng, Zhiping Shi, Yinhe Han, and Xiaowei Li, DDSAS: Dynamic and Differentiable Space-Architecture Search, in IEEE Asian Conference on Machine Learning (ACML), November 17-19, 2021. (Source Code)

• [Lu-BMVC2021] Shun Lu, Yu Hu*, Longxing Yang, Zihao Sun, Jilin Mei, Yiming Zeng, and Xiaowei Li, DU-DARTS: Decreasing the Uncertainty of Differentiable Architecture Search, in IEEE British Machine Vision Conference (BMVC), November 22-25, 2021. (Source Code)

• [Mei-ACA2021] Jilin Mei, Longxing Yang, Zihao Sun, Shun Lu, Yan Xing, Tiantian Jiang, Yu Hu*, Design and Application of a Lightweight Deep Neural Network Software for Resource Constrained Unmanned Systems (in Chinese), in Aerospace Control and Application, 47(6): 9-18 (2021).

2020

• [Niu-SMC2020] Jingyu Niu, Yu Hu*, Beibei Jin, Yinhe Han, and Xiaowei Li, Two-Stage Safe Reinforcement Learning for High-Speed Autonomous Racing, in IEEE International Conference on Systems, Man, and Cybernetics (SMC), 2020.

• [Jin-CVPR2020] Beibei Jin, Yu Hu*, Qiankun Tang, Jingyu Niu, Zhiping Shi, Yinhe Han, and Xiaowei Li, Exploring Spatial-Temporal Multi-Frequency Analysis for High-Fidelity and Temporal-Consistency Video Prediction, in IEEE Conference on Computer Vision and Pattern Recognition (CVPR), 2020. (Source Code)

• [Tang-ICASSP2020] Qiankun Tang, Jie Li, Zhiping Shi, Yu Hu*, LightDet: A Lightweight and Accurate Object Detection Network, in IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2020.

• [Guo-Neurocomputing2020] Qingli Guo, Jing Ye, Yiran Chen, Yu Hu, Yazhu Lan, Guohe Zhang, Xiaowei Li, INOR—An Intelligent noise reduction method to defend against adversarial audio examples, Neurocomputing, 2020.

• [Tang-JCAD2020a] Qiankun Tang and Yu Hu*, PosNeg-Balanced Anchors with Aligned Features for Single-Shot Object Detection (in Chinese), Journal of Computer-Aided Design & Computer Graphics (JCAD), 32(8): 1293-1304 (2020).

• [Tang-JCAD2020b] Qiankun Tang and Yu Hu*, Attention Based Part-Aware Features of Anchor Boxes for Single-Shot Object Detection (in Chinese), Journal of Computer-Aided Design & Computer Graphics (JCAD), 32(11): 1773-1783 (2020).

• [Liu-ACA2020] Hai Liu, Bo Liu, Yu Hu*, Multi-Slope Adaptive Convolutional Neural Network Activation Function (in Chinese), in Aerospace Control and Application, 46(3): 1674-1579 (2020).

2019

• [Zeng-JCAD2019] Zeng Yiming, Hu Yu*, Han Yinhe, and Li Xiaowei, Exploiting Partial Order Relationship of Sparse Point Cloud for Semi-Supervised Monocular Image Depth Estimation (in Chinese), Journal of Computer-Aided Design & Computer Graphics (JCAD), 2019.

• [Li-Access2019] Xiaowei Li, Wenjie Li, Jing Ye, Huawei Li, Yu Hu, Scan Chain Based Attacks and Countermeasures: A Survey. IEEE Access, 2019.

2018

• [Zeng-RAL2018] Yiming Zeng, Yu Hu*, Shice Liu, Jing Ye, Yinhe Han, Xiaowei Li, Ninghui Sun, RT3D: Real-Time 3D Vehicle Detection in LiDAR Point Cloud for Autonomous Driving, in IEEE Robotics and Automation Letters (RA-L), 3(4): 3434-3440, 2018.  (Introduction of RT3D in Chinese by https://zhuanlan.zhihu.com/p/41161184 ) (Source Code)

• [Ye-TCAD2018] Jing Ye, Qingli Guo, Yu Hu*, Xiaowei Li*, Deterministic and Probabilistic Diagnostic Challenge Generation for Arbiter Physical Unclonable Function, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 37(12): 3186-3197, 2018.

• [Liu-NeurIPS2018] Shice Liu, Yu Hu*, Yiming Zeng, Qiankun Tang, Beibei Jin, Yinhe Han, Xiaowei Li, See and Think: Disentangling Semantic Scene Completion, Annual Conference on Neural Information Processing Systems (NeurIPS), 2018. (Introduction of SATNet in Chinese by https://cloud.tencent.com/developer/article/1379919) (YouTube Video) (Source Code)

• [Jin-IROS2018] Beibei Jin, Yu Hu*, Yiming Zeng, Qiankun Tang, Shice Liu, Jing Ye, VarNet: Exploring Variations for Unsupervised Video Prediction, in IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS), 2018. (Source Code)

2017

• [Zeng-IROS2017] Yiming Zeng, Yu Hu*, Shice Liu,  Qiankun Tang, Xiaowei Li, GeoCueDepth: Exploiting Geometric Structure Cues to Estimate Depth from a Single Image, IROS 2017: 17-22.  (Source Code)

• [Lu-FPL2017] Weina Lu, Wenyan Lu, Jing Ye, Yu Hu*, Xiaowei Li, Leveraging PVT-Margins in Design Space Exploration for FPGA-based CNN Accelerators, FPL 2017: 1-4.

• [Lu-TVLSI2017] Weina Lu, Yu Hu*, Jing Ye, and Xiaowei Li, Going Cooler With Timing-Constrained TeSHoP: A Temperature Sensing-Based Hotspot-Driven Placement Technique for FPGAs, IEEE Transaction on Very Large Scale Integration and System (TVLSI), 25(9): 2525 - 2537, 2017

• [Hu-IEICE2017] Yu Hu, Jing Ye, Zhiping Shi, Xiaowei Li, LAPS: Layout-Aware Path Selection for Post-Silicon Timing Characterization. IEICE Transactions 100-D(2): 323-331 (2017)

• [Li-JETC2017] Bing Li, Yu Hu*, Ying Wang, Jing Ye, Xiaowei Li, Power-Utility-Driven Write Management for MLC PCM. JETC 13(3): 50:1-50:22 (2017)

• [Ye-DATE2017] Jing Ye, Qingli Quo, Yu Hu, Xiaowei Li, Fault diagnosis of arbiter physical unclonable function. DATE 2017: 428-433

2016

• [Chen-TODAES2016] Guoqing Chen, Yi Xu, Xing Hu, Xiangyang Guo, Jun Ma, Yu Hu, Yuan Xie: TSocket: Thermal Sustainable Power Budgeting. ACM Trans. Design Autom. Electr. Syst. 21(2): 29:1-29:22 (2016)

• [Ye-CCS2016] Jing Ye, Yu Hu, Xiaowei Li: Attack on Non-Linear Physical Unclonable Function, poster in CCS 2016: 1751-1753.

• [Ye-FPGA2016] Jing Ye, Yu Hu, Xiaowei Li: DCPUF: Placement and Routing Constraint based Dynamically Configured Physical Unclonable Function on FPGA (Abstact Only). FPGA 2016: 279.

• [Lu-FPL2016] Weina Lu, Yu Hu, Jing Ye, Xiaowei Li: TeSHop: A Temperature Sensing based Hotspot-Driven Placement Technique for FPGAs, FPL 2016: 1-4.

• [Guo-ATS2016] Qingli Guo, Jing Ye, Yue Gong, Yu Hu, Xiaowei Li: Efficient Attack on Non-Linear Current Mirror PUF with Genetic Algorithm, ATS 2016: 49-54.

• [Ye-AsianHOST2016] Jing Ye, Yu Hu, Xiaowei Li: RPUF: Physical Unclonable Function with Randomized Challenge to resist modeling attack. AsianHOST 2016: 1-6

2015

• [Ye-TVLSI2015] Jing Ye, Yu Huang, Yu Hu, Wu-Tung Cheng, Ruifeng Guo, Liyang Lai, Ting-Pu Tai, Xiaowei Li, Weipin Changchien, Daw-Ming Lee, Ji-Jan Chen, Sandeep C. Eruvathi, Kartik K. Kumara, Charles Liu, Sam Pan: Diagnosis and Layout Aware (DLA) Scan Chain Stitching, IEEE Trans. VLSI Syst. 23(3): 466-479 (2015).

• [Liu-DAC2015] Yang Liu, Shiyan Hu, Jie Wu, Yiyu Shi, Yier Jin, Yu Hu, Xiaowei Li: Impact Assessment of Net Metering on Smart Home Cyberattack Detection. DAC 2015: 1-6

• [Ye-IOLTS2015] Jing Ye, Yu Hu, Xiaowei Li: OPUF: Obfuscation Logic Based Physical Unclonable Function. IOLTS 2015: 156-161

2014

• [Hu-TVLSI2014] Xing Hu, Guihai Yan, Yu Hu, Xiaowei Li: Orchestrator: Guarding Against Voltage Emergencies in Multi-threaded Applications, IEEE Trans. VLSI Syst. 22(12): 2476-2487 (2014).

• [Huang-TVLSI2014] Keheng Huang, Yu Hu, Xiaowei Li: Reliability-Oriented Placement and Routing Algorithm for SRAM-Based FPGAs. IEEE Trans. VLSI Syst. 22(2): 256-269 (2014).

• [Ye-TVLSI2014] Jing Ye, Yu Hu, Xiaowei Li, Wu-Tung Cheng, Yu Huang, Huaxing Tang: Diagnose Failures Caused by Multiple Locations at a Time. IEEE Trans. VLSI Syst. 22(4): 824-837 (2014)

• [Hu-DAC2014] Xing Hu, Yi Xu, Jun Ma, Guoqing Chen, Yu Hu, Yuan Xie: TSocket: Thermal Sustainable Power Budgeting, DAC, 2014: 1-6.

• [Hu-ASPDAC2014] Xing Hu, Yi Xu, Yu Hu, Yuan Xie: SwimmingLane: A composite approach to mitigate voltage droop effects in 3D power delivery network. ASPDAC 2014: 550-555

• [Li-DATE2014] Bing Li, Shuchang Shan, Yu Hu, Xiaowei Li: Partial-SET: Write Speedup of PCM Main Memory. DATE 2014: 1-4.

• [Gu-NAS2014] Junli Gu, Bradford M. Beckmann, Ting Cao, Yu Hu: iCHAT: Inter-Cache Hardware-Assistant Data Transfer for Heterogeneous Chip Multiprocessors. NAS 2014: 242-251

2013

• [Hu-DATE2013] Xing Hu, Guihai Yan, Yu Hu, Xiaowei Li: Orchestrator: a low-cost solution to reduce voltage emergencies for multi-threaded applications. DATE 2013: 208-213

• [Zhang-DATE2013] Xiaolin Zhang, Jing Ye, Yu Hu, Xiaowei Li: Capturing post-silicon variation by layout-aware path-delay testing. DATE 2013: 288-291

• [Li-PRDC2013] Bing Li, Shuchang Shan, Yu Hu, Xiaowei Li: Tolerating Noise in MLC PCM with Multi-Bit Error Correction Code. PRDC 2013: 226-231

• [Yang-IOLTS2013] Enshan Yang, Keheng Huang, Yu Hu, Xiaowei Li, Jian Gong, Hongjin Liu, Bo Liu: HHC: Hierarchical hardware checkpointing to accelerate fault recovery for SRAM-based FPGAs. IOLTS 2013: 193-198

• [Ye-ITC2013] Jing Ye, Yu Huang, Yu Hu, Wu-Tung Cheng, Ruifeng Guo, Liyang Lai, Ting-Pu Tai, Xiaowei Li, Wei-pin Changchien, Daw-Ming Lee, Ji-Jan Chen, Sandeep C. Eruvathi, Kartik K. Kumara, Charles C. C. Liu, Sam Pan: Diagnosis and Layout Aware (DLA) scan chain stitching. ITC 2013: 1-10

• [Hu-CJC2013] Xing Hu, Song-Jun Pan, Yu Hu, Xiao-Wei Li: Mitigating voltage emergency in simultaneous multithreading processor by memory level parallelism aware thread scheduling. Jisuanji Xuebao (Chinese Journal of Computers), 36 (5): 1065-1075 (2013) (In Chinese)

2012

• [Pan-TVLSI2012] Songjun Pan, Yu Hu, and Xiaowei Li, IVF: Characterizing the Vulnerability of Microprocessor Structures to Intermittent Faults, in the IEEE Transactions on VLSI Systems (TVLSI), 2012, 20(5): 777-790.

• [Huang-DATE2012] Keheng Huang, Yu Hu, Xiaowei Li, Bo Liu, Hongjin Liu, and Jian Gong, Off-path Leakage Power Aware Routing for SRAM-based FPGAs, in the Proceedings of IEEE/ACM Conference on Design, Automation and Test in Europe (DATE), Dresden, Germany, 12-16 March, 2012, pp. 87-92.

• [Hu-ATS2012] Yu Hu, Xinli Gu, Xiaowei Li, In-Field Testing of NAND Flash Storage: Why and How? in the Proceedings of IEEE Asian Test Symposium(ATS), Niigata, Japan, 19-22 November, 2012, pp. 69.

2011

• [Li-VLSI2011] Jia Li, Xiao Liu, Yubin Zhang, Yu Hu, Xiaowei Li, and Qiang Xu, Capture-Power-Aware Test Data Compression Using Selective Encoding, in the Integration, the VLSI Journal, 2011, 44(3): 205-216.

• [Li-SIC2011] Jia Li, Yu Hu, Xiaowei Li, Scan Chain Design for Shift Power Reduction in Scan-based Testing, in the Science in China (Information Sciences), 2011, 54(4): 767-777.

• [Wu-TCAD2011] Shianling Wu, Laung-Terng Wang, Xiaoqing Wen, Zhigang Jiang, Lang Tan, Yu Zhang, Yu Hu, Wen-Ben Jone, Michael S. Hsiao, James Chien-Mo Li, Jiun-Lang Huang, and Lizhen Yu, Using Launch-on-Capture for Testing Scan Designs Containing Synchronous and Asynchronous Clock Domains, in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2011, 30(3): 455-463.

• [Shang-TIS2011] Lihong Shang, Mi Zhou, Yu Hu, and Erfu Yang, A Domain Partition Model Approach to the Online Fault Recovery of FPGA-Based Reconfigurable Systems, in the IEICE Transactions on Information and Systems, 2011, E94-A(1): 290-299.

• [Huang-ATS2011] Keheng Huang, Yu Hu, Xiaowei Li, Gengxin Hua, Hongjin Liu, and Bo Liu, Exploiting Free LUT Entries to Mitigate Soft Errors in SRAM-based FPGAs, in the Proceedings of IEEE Asian Test Symposium (ATS), New Delhi, India, 21-23 November, 2011, pp. 438-443.

• [Shan-DSN2011] Shuchang Shan, Yu Hu, and Xiaowei Li, Transparent Dynamic Binding with Fault-Tolerant Cache Coherence Protocol for Chip Multiprocessors, in the Proceedings of IEEE /IFIP International Conference on Dependable Systems and Networks (DSN), Hongkong, China, 27-31 June, 2011, pp. 291-302.

• [Pan-DATE2011] Songjun Pan, Yu Hu, Xing Hu, and Xiaowei Li, A Cost-effective Substantial-impact-filter Based Method to Tolerate Voltage Emergencies, in the Proceedings of IEEE /ACM Conference on Design, Automation and Test in Europe (DATE), Grenoble, France, 14-18 March, 2011, pp. 311-316.

• [Huang-DATE2011] Keheng Huang, Yu Hu, and Xiaowei Li, Cross-layer Optimized Placement and Routing for FPGA Soft Error Mitigation, in the Proceedings of IEEE /ACM Conference on Design, Automation and Test in Europe (DATE), Grenoble, France, 14-18 March, 2011, pp. 58-63.

• [Ye-DATE2011] Jing Ye, Yu Hu, and Xiaowei Li, On Diagnosis of Multiple Faults Using Compacted Responses, in the Proceedings of IEEE /ACM Conference on Design, Automation and Test in Europe (DATE), Grenoble, France, 14-18 March, 2011, pp. 679-684.

2010

• [Li-TVLSI2010] Jia Li, Qiang Xu, Yu Hu, and Xiaowei Li, X-Filling for Simultaneous Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing, in the IEEE Transactions on VLSI Systems (TVLSI), 2010, 18(7): 1081-1092.

• [Pan-DATE2010] Songjun Pan, Yu Hu, and Xiaowei Li, IVF: Characterizing the Vulnerability of Microprocessor Structures to Intermittent Faults, in the Proceedings of IEEE /ACM Conference on Design, Automation and Test in Europe (DATE), Dresden, Germany, 8-12 March, 2010, pp. 238-243. (Best Paper Award Nomination)

• [Ye-DATE2010] Jing Ye, Yu Hu, and Xiaowei Li, Diagnosis of Multiple Arbitrary Faults with Mask and Reinforcement Effect, in the Proceedings of IEEE /ACM Conference on Design, Automation and Test in Europe (DATE), Dresden, Germany, 8-12 March, 2010, pp. 885-890.

• [Ye-ATS2010] Jing Ye, Xiaolin Zhang, Yu Hu, and Xiaowei Li, Substantial Fault Pairs at-A-Time (SFPAT): An Automatic Diagnostic Pattern Generation Method, in the Proceedings of IEEE Asian Test Symposium (ATS), Shanghai, China, 1-4 December, 2010, pp. 192-197.

• [Kong-WRTLT2010] Luning Kong, Yu Hu, and Xiaowei Li, A Scalable Test Access Mechanism for Godson-T Multi-core Processor, in the Digest of Papers of IEEE Workshop on RTL and High Level Testing(WRTLT), Shanghai, China, 5-6 December, 2010, pp. 147-152.

• [Hu-CDC2010] Yu Hu, Zhongliang Chen, and Xiaowei Li, Using Data-Level Parallelism to Accelerate Instruction-Level Redundancy, in the Proceedings of Conference on Dependable Computing (CDC), Yichang, China, 20-22 November, 2010, pp. 421-425.

2009

• [Wang-JCAD2009] Fei Wang, Yu Hu, and Xiaowei Li, Deterministic Diagnosis Pattern Generation for Scan Chain Faults, Journal of Computer-Aided Design & Computer Graphics, 2009, 21(1): 6-12. (In Chinese)

• [Xie-JCAD2009] Yuanjiang Xie, Da Wang, Yu Hu, and Xiaowei Li, Memory BISR Based on Content Addressable Memory, Journal of Computer-Aided Design & Computer Graphics, 2009, 21(4): 467-473. (In Chinese)

• [Pan-PRDC2009] Songjun Pan, Yu Hu, and Xiaowei Li, Online Computing and Predicting Architectural Vulnerability Factor of Microprocessor Structures, in the Proceedings of IEEE Pacific Rim International Symposium on Dependable Computing (PRDC), Shanghai, China, 16-18 November, 2009, pp. 345-350.

• [Xie-ECST2009] Yuanjiang Xie, Xiang Fu, Zijian He, Yang Zhao, Yu Hu, and Xiaowei Li, A Self-Repairable Microprocessor, ECS Transactions, 2009, 18(1): 249-254.

• [Zhou-HPCC2009] Mi Zhou, Lihong Shang, and Yu Hu, Reliability Optimization of Reconfigurable Computing-Based Fault-Tolerant System, in the Proceedings of IEEE International Conference on High Performance Computing and Communications (HPCC), 2009: 369-375.

• [Zhou-ICESS2009] Mi Zhou, Lihong Shang, and Yu Hu, Reliability Optimization of Reconfigurable FPGA Based on Second-Order Approximation Domain-Partition, the Proceedings of IEEE International Conferences on Embedded Software and Systems (ICESS), 2009: 511-516.

2008

• [Wang-JCST2008] Da Wang, Yu Hu, Huawei Li, and Xiaowei Li, The Design-for-Testability Features and Test Implementation of a Giga Hertz General Purpose Microprocessor, Journal of Computer Science and Technology (JCST), 2008, 23(6): 1037-1046.

• [Wang-ITC2008] Fei Wang, Yu Hu, Huawei Li, Xiaowei Li, Jing Ye and Yu Huang, Deterministic Diagnostic Pattern Generation (DDPG) for Compound Defects, in the Proceedings of IEEE International Test Conference(ITC), Santa Clara, CA, USA, 28-30 October, 2008, paper 14.1.

• [Li-ICCAD2008] Jia Li, Xiao Liu, Yubin Chen, Yu Hu, Xiaowei Li, and Qiang Xu, On Capture Power-Aware Test Data Compression for Scan-Based Testing, in the Proceedings of IEEE /ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, 10-13 November, 2008, paper 1C.3.

• [Li-DATE2008] Jia LI, Qiang XU, Yu HU, and Xiaowei LI, iFill: An Impact-Oriented X-Filling Method for Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing, in the Proceedings of IEEE /ACM Conference on Design, Automation and Test in Europe (DATE), 2008, pp. 1184-1189.

• [Ye-ITC2008p] Jing Ye, Fei Wang, Yu Hu, and Xiaowei Li, Diagnosis of Mask-Effect Multiple Timing Faults in Scan Chains, in the Proceedings of IEEE International Test Conference(ITC), Santa Clara, CA, USA, 28-30 October, 2008, poster 15.

• [Hu-ASP-DAC2008] Yu Hu, Xiang Fu, Xiaoxin Fan, and Hideo Fujiwara, Localized Random Access Scan: Towards Low Area and Routing Overhead, in the Proceedings of IEEE/ACM International Conference on Asia and South Pacific Design Automation(ASP-DAC), 2008, pp. 565-570.

• [Wang-ASP-DAC2008] Fei Wang, Yu Hu, Huawei Li, and Xiaowei Li, A Design-for-Diagnosis Technique for Diagnosing both Scan Chain Faults and Combinational Circuit Faults, in the Proceedings of IEEE/ACM International Conference on Asia and South Pacific Design Automation(ASP-DAC), 2008, pp. 571-576.

• [Li-ASP-DAC2008] Jia Li, Qiang Xu, Yu Hu, and Xiaowei Li, On Reducing Both Shift and Capture Power for Scan-based Testing, in the Proceedings of IEEE/ACM International Conference on Asia and South Pacific Design Automation(ASP-DAC), 2008, pp. 653-658.

• [Fu-ASP-DAC2008] Xiang Fu, Huawei Li, Yu Hu, and Xiaowei Li, Robust Test Generation for Power Supply Noise Induced Path Delay Faults, in the Proceedings of IEEE/ACM International Conference on Asia and South Pacific Design Automation(ASP-DAC), 2008, pp. 659-662.

• [Zhang-VTS2008] Ying Zhang, Huawei Li, Xiaowei Li, and Yu Hu, Codeword Selection for Crosstalk Avoidance and Error Correction on Interconnects, in the Proceedings of IEEE VLSI Test Symposium (VTS), 2008, pp. 377-382.

• [Wang-ATS2008] Fei Wang, Yu Hu, Yu Huang, Jing Ye, and Xiaowei Li, Observation Point Oriented Deterministic Diagnosis Pattern Generation (DDPG) for Chain Diagnosis, in the Proceedings of IEEE Asia Test Symposium(ATS), 2008, pp. 185-190.

• [Li-DELTA2008] Jia Li, Qiang Xu, Yu Hu, and Xiaowei Li, Channel Width Utilization Improvement in Testing NoC-Based Systems for Test Time Reduction, in the Proceedings of IEEE International Symposium on Electronic Design, Test & Applications(DELTA), 2008, pp. 26-31.

• [Wang-DELTA2008] Fei Wang, Yu Hu, and Xiaowei Li, Adaptive Diagnostic Pattern Generation for Scan Chains, in the Proceedings of IEEE International Symposium on Electronic Design, Test & Applications(DELTA), 2008, pp. 129-132.

• [Wang-DELTA2008] Da Wang, Rui Li, Yu Hu, Huawei Li, and Xiaowei Li, A Case Study on At-Speed Testing for a Gigahertz Microprocessor, in the Proceedings of IEEE International Symposium on Electronic Design, Test & Applications(DELTA), 2008, pp. 326-331.

• [Liu-DELTA2008] Hui Liu, Huawei Li, Yu Hu, and Xiaowei Li, A Scan-Based Delay Test Method for Reduction of Overtesting, in the Proceedings of IEEE International Symposium on Electronic Design, Test & Applications(DELTA), 2008, pp. 521-526.

2007

• [Han-TVLSI2007] Yinhe Han, Yu Hu, Xiaowei Li, Anshuman Chandra, and Huawei Li, Embedded Test Decompressor to Reduce the Required Channels and Vector Memory of Tester for System-on-a-Chip, IEEE Transactions on VLSI Systems (TVLSI), 2007, 15(5): 531-540.

• [Wang-JCST2007] Wei Wang, Yu Hu, Yinhe Han, Xiaowei Li, and Yousheng Zhang, Leakage Current Optimization Techniques during Test based on Don’t Care Bits Assignment, Journal of Computer Science and Technology(JCST), 2007, 22(5): 673-680.

• [Fan-JCAD2007] Xiao-Xin FAN, Huawei LI, Yu HU, and Xiaowei Li, An At-Speed Scan Test Scheme Using On-Chip PLL, Journal of Computer-Aided Design & Computer Graphics, 2007, 19(3): 366-370. (In Chinese)

• [Wu-JCAD2007] Mingxing Wu, Yinhe Han, Yu Hu, and Xiaowei Li, Research and Realization on Test Vector Translation Model Based on STIL, Journal of Computer-Aided Design & Computer Graphics, 2007, 19(1): 114-118. (In Chinese)

• [Wang-JCRAD2007] Wei Wang, Yinhe Han, Yu Hu, Xiaowei Li, and Yousheng Zhang, An Effective Low-Power Scan Architecture-PowerCut, Journal of Computer Research and Development, 2007, 44(3): 473-478. (In Chinese)

• [Wang-ITC2007] Da Wang, Xiaoxin Fan, Xiang Fu, Hui Liu, Ke Wen, Peter Li, Huawei Li, Yu Hu, and Xiaowei Li, The Design-For-Testability Features of Godson-2 Microprocessor, in the Proceedings of IEEE International Test Conference(ITC), 2007, paper 9.2.

• [Fan-ATS2007] Xiao-Xin FAN, Yu HU, and Laung-Terng (L.-T.) WANG, An On-Chip Test Clock Control Scheme for Multi-Clock at-Speed Testing, in the Proceedings of IEEE Asia Test Symposium(ATS), 2007, pp. 341-348.

• [Li-TenCon2007] Jia Li, Yu HU, and Xiaowei Li, Test Cost Efficiency Exploration for CMT Processors, in the Proceedings of IEEE Region 10 Conference(TenCon), 2007, WeSC-O3.2.

• [Wang-TenCon2007] Da Wang, Yuanjiang Xie, Yu Hu, Huawei Li, and Xiaowei Li, Hierarchical Fault Tolerance Memory Architecture With 3-Dimension Interconnect, in the Proceedings of IEEE Region 10 Conference(TenCon), 2007, FrSC-O9.2.

• [Wang-WRTLT2007] Fei Wang, Yu Hu and Xiaowei Li, A Design-For-Diagnosis Technique for Diagnosing Integrated Circuit with Faulty Scan Chain, in the Digests of IEEE Workshop on RTL and High Level Testing(WRTLT), 2007, pp. 51-57.

2006

• [Hu-IEICE2006] Yu Hu, Yinhe Han, Xiaowei Li, Huawei Li, and Xiaoqing Wen, Compression/Scan Co-Design for Reducing Test Data Volume, Scan-in Power Dissipation, and Test Application Time, IEICE Transactions on Information and Systems, 2006, E89-D(10): 2616-2625.

• [Li-JCAD2006] Jia LI, Yu HU, and Xiaowei LI, SCANGIN: An Approach for Reducing Dynamic Power Dissipation in Scan Test, Journal of Computer-Aided Design & Computer Graphics, 2006, 18(9): 1391-1396. (In Chinese)

• [Dong-JCRAD2006] Jie Dong, Yu Hu, , Yinhe Han and Xiaowei Li, A Multiple-Scan-Chain Test Approach Based on Combinational Decompression Circuits, Journal of Computer Research and Development, 2006, 43(6): 1001-1007-478. (In Chinese)

• [Wang-JCAD2006] Wei Wang, Yinhe Han, Yu Hu, Xiaowei Li, and Yousheng Zhang, Wrapper Design for Low Cost and Low Power in SoC Test, Journal of Computer-Aided Design & Computer Graphics, 2006, 18(9): 1397-1402. (In Chinese)

• [Hu-ATS2006] Yu Hu, Cheng Li, Jia Li, Yin-He Han, Xiao-Wei Li, Wei Wang, Hua-Wei Li, Laung-Terng (L.-T.) Wang, and Xiao-Qing Wen, Test Data Compression Based on Clustered Random Access Scan, in the Proceedings of IEEE Asia Test Symposium(ATS), 2006, pp. 231-236.

• [Li-ATS2006] Jia LI, Yu HU, and Xiaowei LI, A Scan Chain Adjustment Technology for Test Power Reduction, in the Proceedings of IEEE Asia Test Symposium(ATS), 2006, pp. 11-16.

• [Wen-WRTLT2006] Ke Wen, Yu Hu, and Xiaowei Li, Deterministic Circular Self Test Path, in the Digests of IEEE Workshop on RTL and High Level Testing(WRTLT), 2006, pp. 117-122.

2005

• [Hu-JCRAD2005] Yu Hu, Yinhe Han and Xiaowei Li, Design-for-Testability and Test Technologies for System-on-a-Chip, Journal of Computer Research and Development, 2005, 42(1): 153-162. (In Chinese)

• [Hu-JCAD2005] Yu Hu, Yinhe Han, Huawei Li, Tao Lv, and Xiaowei Li, SoC Test Scheduling Based on Scan Chain Balance of Pair Cores, Journal of Computer-Aided Design & Computer Graphics, 2005, 17(10): 2203-2208. (In Chinese)

• [Han-IEICE2005] Yinhe Han, Yu Hu, Xiaowei Li, Huawei Li, Anshuman Chandra, and Xiaoqing Wen, Wrapper Scan Chains Design for Rapid and Low Power Testing of Embedded Cores, IEICE Transactions on Information and Systems, 2005, E88-D(9): 2126-2134.

• [Hu-PRDC2005] Yu Hu, Yinhe Han, and Xiaowei Li, Compression/Scan Co-Design to Reduce Test Data Volume, Scan-in Power Dissipation and Test Application Time, in the Proceedings of IEEE Pacific Rim International Symposium on Dependable Computing (PRDC), 2005, pp. 175-182.

• [Han-ASP-DAC2005] Yinhe Han, Yu Hu, Xiaowei Li, and Huawei Li, Theoretic Analysis and Enhanced X-Tolerance of Test Response Compact based on Convolutional Code, in the Proceedings of IEEE/ACM International Conference on Asia and South Pacific Design Automation(ASP-DAC), 2005, pp. 53-58.

• [Han-ISLQED2005] Yinhe Han, Yu Hu, Huawei Li, and Xiaowei Li, Using MUXs Network to Hide Bunches of Scan Chains, in the Proceedings of IEEE International Symposium on Quality Electronic Design(ISLQED), 2005, pp. 238-243.

2004

• [Hu-ATS2004] Yu Hu, Yinhe Han, Huawei Li, Tao Lv, and Xiaowei Li, Pair Balance-Based Test Scheduling for SOCs, in the Proceedings of IEEE Asia Test Symposium(ATS), 2004, pp. 236-241.

• [Han-ATS2004] Yinhe Han, Yu Hu, A. Chandra, Huawei Li, and Xiaowei Li, Rapid and Energy-Efficient testing for Embedded Cores, in the Proceedings of IEEE Asia Test Symposium(ATS), 2004, pp. 8-13.

• [Han-DFT2004] Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, and Anshuman Chandra, Response Compaction for Test Time and Test Pins Reduction Based on Advanced Convolutional Codes, in the Proceedings of IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems(DFT), 2004, pp. 298-305.